Green Streak Programs, founded in 1988, specializes in IBIS modeling seminars and hands-on workshops.  We support VHDL-AMS, Verilog-AMS, and IBIS model creation and simulation for Mentor Graphics (SystemVision, HyperLynx) and Cadence (Allegro SI) EDA tools.

For private workshops, hands-on labs using IBISCenter (developed by Arpad Muranyi, then of Intel) and HyperLynx (by Mentor Graphics) can be added to the seminar materials.  Hands-on workshops allow attendees to enhance their technical intuition, skills, and methodology.


2011 Seminar Schedule


After attending one of our seminars, an engineer will have an enhanced understanding and ability to apply methodology and tools for high speed modeling, signal integrity, and power integrity.


October 17-18: IBIS Modeling Seminar.  Hosted by EXAR, Fremont, CA (


October 19: IBIS-AMS: An Overview for Model Developers.  Hosted by EXAR, Fremont, CA (


Seminars are limited to 20 people.  Materials include handouts, plus a CD containing the handouts, the IBIS Quality Checklist, good and bad IBIS example files, papers and other background materials.  Lunch is included.


Registration Form

 Interested in hosting a public seminar?   Sponsor a public seminar, and receive 3 free seminar seats.

IBIS Modeling Seminar (2 days)

         The IBIS specification, syntax, and golden parser

         The IBIS Quality Checklist

         Model validation and model accuracy

         Creating IBIS models from SPICE

         Creating IBIS models from test data

         Differential models in IBIS

         Modeling packages and interconnects (PKG, EBD, ICM)

         Touchstone and S-parameters in IBIS

         External circuits and models : AMI, AMS and SPICE



NEW!  IBIS-AMS An Overview for Model Developers Seminar (1 day)

         IBIS specification for VHDL-AMS model use

        VHDL and VHDL-AMS syntax

         Digital and analog I/O models

         Reading and interpreting a single-pin model

         Reading and interpreting a differential model

         Calling the model, and related IBIS specifics

         Compiling a model, and related simulation specifics

         Test bench models

         Model validation and model accuracy





BOOK: Semiconductor Modeling: : For Simulating Signal, Power, and Electromagnetic Integrity

by Roy Leventhal and Lynne Green, Springer, Fall 2006.  The focus is on methodology for designing high-speed PCBs, including sections on IBIS modeling and a chapter on model validation.  Additional material about the book can also be found at


A review by Bob Ross:

Semiconductor Modeling: For Simulating Signal, Power, and Electromagnetic Integrity provides a very readable and excellent resource for several modeling approaches needed in advanced design.

The book includes the broadest coverage to date of all aspects of the IBIS Standard, now well-established in industry.  Formal syntactical topics are included along with important practical concerns of model quality and proper usage.

Connecting IBIS with other modeling formats and methods works well and preserves continuity in addressing multiple design issues.  So this book is very valuable addition to one's library.

Bob Ross

Teraspeed Consulting Group

Former Chair of the EIA IBIS Open Forum




Dr. Lynne Green worked as a design engineer for many years, most recently with the SPECCTRAQuest group at Cadence Design Systems and previously with the HyperLynx group at Innoveda (acquired by Mentor Graphics).  Dr. Green has worked with a number of modeling languages, including SPICE, IBIS, VHDL-AMS, and Verilog-A.  She has developed training materials for a number of companies, and is the author of two books and numerous articles.  Lynne was Vice-Chair of the IBIS Open Forum from 2002 to 2004.  Dr. Green holds a PhD in Electrical Engineering from the University of Washington.




Please contact us for quotes on modeling services and on-site workshops:

Contact:            Lynne Green


Phone:             425-788-0412

Snail mail:       20130 181st PL NE, Woodinville , WA 98077



See our membership listing on the IBIS Roster page!




Presentations by Dr. Green


HyperLynx and the IBIS Quality Checklist, L. Green and M. Pillie, Mentor User2User 2005


Full paper


IBIS Workshop, JEDEX 2004


The IBIS Model Review Committee


Use of [Ramp] in IBIS 4.1


A BIRD75 Multi-lingual Example


Modeling Approaches - Tables and Equations



Modeling Links


IBIS Home Page (follow links to Cookbook, Summits, Training, s2ibis3, Model Review Committee, etc.)


Compact Model Council




Verilog, Verilog-AMS, SystemVerilog,


Compact Models for Power Devices (University of Washington)


Timing Analysis


UC Berkeley SPICE Home Page


Bit Error Rate Analysis



Other links of interest

Wild River Technology LLC


Roy Leventhal


Bogatin Enterprises (subsidiary of LeCroy Corp)




Step Response SI Consulting, Inc


Simberian (S-parameter extraction)


Differential termination for various interface standards


Windows version of FastHenry field solver


MEMS group at the University of Washington